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8085    I bought this board at a ham radio fleamarket in 1999. It came from the estate of Stan Heaps (silent key VE1AVT). I was interested in it because I had not at that time had the opportunity to work with an 8085 microprocessor chip.

The board is an evaluation board of sorts. It came with no documentation so I don’t know if the circuit was Stan’s design or whether he copied it from somewhere. I would be interested to find out.

Power (5 volts) is applied to the red and black wires at the right. The 8085 microprocessor chip is the 40-pin chip towards the top right. It has an internal clock oscillator using the 3.579545 MHz crystal to the left of the 8085.

At the bottom centre, is a 24-pin 2016 2K byte random access memory (RAM) chip. To the right of it is an empty socket for another 2K memory chip. Marked out to the right of that is space for two more. To the left of the memory chips are four DIP (Dual Inline Package) switches, one for each memory chip. These switches control the write line to each chip thus enabling each memory chip to be write-protected. There are no read only memory chips (EPROM or EEPROM) so any instructions must be inputted manually and are lost when power is removed.

The 8085 uses sixteen address lines and eight data lines but it multiplexes the eight data lines with the lower eight address lines. These lines are demultiplexed on the board so that the eight data lines have their own data bus. In the centre of the board there are three bar-LED (Light Emitting Diode) chips that show the status of the sixteen address lines and the eight data lines.

At the top left is a switch labeled “DMA “ (Direct Memory Access) and red and black banana plug sockets. At the foot of the first column of chips is an empty 16-pin socket labeled “DMA PORT” that carries the sixteen multiplexed address and data lines.

When the DMA switch is set to ON, the 8085 is halted and this switch panel is enabled. On this panel, address lines A15 through A12 are hard-wired low and the twelve switches control address lines A11 through A8 and multiplexed address/data lines DA7 through DA0. An address is set using the twelve switches and the “ADDR” button at bottom left of the main board is pressed to set the address bus. This address now shows on the address bar-LEDs. If the RD/WR switch below the DMA switch is set to RD (read) then the current value of the byte at that address is shown on the data bar-LEDs.

To enter data, the rightmost eight switches are then set to the required data, the RD/WR switch is set to WR (write) and the “DATA” button (to the right of the ADDR button) is pressed. This writes the byte to memory. The data bar-LEDs now change to show the new data as the current data at that address.

To continue the process, the twelve data switches are then set to the next address and the cycle repeated. When finished entering data, the DMA switch is moved to “OFF” and the processor takes over again. Since there is no way to set the programme counter, one would normally enter the data starting at address zero and then reset the CPU, causing it to restart at that address.

Using the eight rightmost switches for entry of the data means that they have to be set over again for the next address. This makes data entry a time-consuming process. It’s time-consuming enough to have to enter data one byte at a time without the added complication of having to reset the address for  every byte. For this reason, that part of the design is in great need of improvement.

To the right of the main board are some more switches shown in more detail at right. At the top is a red push button that resets the 8085. Below that is a switch that puts the 8085 in “Hold” mode which frees up the address and data buses. An LED on the board to the left of this switch shows the status of the Hold line.

Below the hold status LED on the main board are two more LEDs that monitor the status of the S0 and S1 lines of the 8085. These lines provide information as to what status the 8085 is in. A small chart below the Hold switch explains: WR (a write cycle); RD (a read cycle); FT (a fetch cycle); and HLT (the 8085 is halted).

Below the chart is a “READY” switch. The READY line is an input to the 8085 that tells it that the memory or I/O address being read or written to has responded. The line is usually held high (true). If the READY switch is moved to the OFF position, the 8085 waits for it to go high before continuing.

Below the READY switch is a “ONE STEP” switch. If the READY switch is set to OFF so that the 8085 is waiting, moving the ONE STEP switch right then left (on then off), cycles the READY line on and off again allowing the 8085 to complete the read, write or instruction fetch and then wait for completion of the next one. In this way, one can step through a programme one instruction (actually one cycle) at a time.

Finally, at the left of the main board is an edge connector socket that is not used. At the top centre of the board is an empty 16-pin socket that has only two pins connected, these going to the 8085’s serial in and out lines.

A panel with twelve switches, shown at left, has a 16-pin socket and two banana plugs. A ribbon cable (not shown) connects the 16-pin socket to the DMA PORT and the wire with the banana plugs goes to the banana plug sockets on the main board to provide a source of logic high and low signals.

Next to the 16-pin DMA PORT socket is another 16-pin socket labeled “IN PORT 0”. This is connected by ribbon cable (not shown) to the eight-switch panel shown at right. These eight switches are set high or low and are then read by an instruction to read port zero. An instruction to write to port zero sets the bar-LEDS above the “IN PORT 0” socket. The red push-button on the switch panel is connected to the reset line.

I spent some time with this board learning the capabilities of the 8085 microprocessor. I planned some improvements to the board and designed the new circuits but I never built them.